Hello, we got this assignment at school about cpu cache. We have a simulator of cpu cache. I can set access time for cache to 10ns and access time for ram to 100ns. So why is the access time from ram 800ns if there is a cache miss? No matter what else i change, there is always such a big delay. This delay is far higher than if the cpu would read direct from ram. If there is a high hit rate, the average access time falls to around 50-60 ns.
I don't know anything about your simulator, but it sounds like it's working properly. If there's a cache miss, ram is used to repack the cache with the missing values from somewhere; otherwise, the the lookup against the cache succeeded, accounting for your high hit rate. This is also dependent on your cache being correctly indexed.
Do you now what exactly is going on when there is a cache miss? I guess there is something more going on than just ram reading. Maybe the ram is being read more than once? I dont understand why it takes so long.
