hi all, I've read some books of hardware, they were pretty good but I couldn't find the answer to the following question: At which speed does the northbridge (called MCH in intel architecture) PROCESS INFORMATION ?? I know that it generates the clock of the system which is the base of the FSB and CPU speed, but the northbridge is also connected to different buses such as the DMI, AGP or PCI-Express and memory bus, each of them running at different speeds, but to perform some operation the chipset has to have some frequency at which it does so (I think) ... How exactly this works? , How can the northbridge communicate with different components on different buses with different speeds? How the northbridge process information? (and at which speed?) I searched that in google but I got more confused Thanks in advance!
That is a good question, one which I've never thought about. I would guess that the northbridge operates at the FSB speed for processing. It probably uses some synchronising mechanism to communicate with buses at different speeds. E.g. the FSB handles the RAM and FSB speeds at different speeds if the ratio is not 1:1. If you find any more information, post here and let us know of your findings.
The chipset would be better though of as an on/off-ramp than a processor. It's not to say no sort of processing is done, but it's not on the same level as a CPU or GPU. The chipset negotiates traffic from different buses and such, so it's a little hard to say it runs at any one speed. It would likely be based on a common frequency to all communication going through that, as Addis was alluding to.
Yeah, the freqeuncy from from the pll clock generator. Its a good point though... how does it deal with so many frequencies? I think "synchronising" is the word to search for...I'll have to get onto google later and have a look.
