Itainium's EPIC: Not Quite DOA?

Discussion in 'News and Article Comments' started by Big B, Nov 13, 2005.

  1. Big B

    Big B HWF Godfather

    Likes Received:
    145
    Trophy Points:
    63
    While the Itainium is probably not something we all drool over, and generally has been considered a joke by everyone, the guys at Anandtech have a very interesting article on the benefits of the EPIC architecture employed by the Itainium family.

    Although the Itanium is capable of sustaining a theoretical maximum of 6 instructions and executing up to 11 instructions, and despite its massive register set, it uses fewer transistors for its core than all competitors. The main disadvantage is that it needs much more cache and instruction fetch width, but the disadvantage of needing more cache diminish as process technology gets better (smaller). To improve performance, the Itanium needs much bigger caches than its competitors, but this adds very little to the overall power consumption. As superscalar RISCs in x86 competitors increase their instruction execution width, they need to upgrade the Out-Of-Order buffers and more importantly, increase the complexity of the schedulers. This leads to a much higher complexity and power consumption.

    This is simply a fascinating article, which you can read over here.
     
  2. Addis

    Addis The King

    Likes Received:
    91
    Trophy Points:
    48
    I read that, but Intel must realise that theres more to being a leader in the CPU market than just technological superiority. The itanic will still eventually sink IMO in favour of more clustered processing with Opterons/Xeons.
     
  3. Big B

    Big B HWF Godfather

    Likes Received:
    145
    Trophy Points:
    63
    Well, the Itanic probably will sink. However, the EPIC architecture could reappear later on if we could move away from the x86 architecture...and that's kinda the problem, especially with Apple moving their Macs into x86 with Intel CPU's.
     
  4. Anti-Trend

    Anti-Trend Nonconformist Geek

    Likes Received:
    118
    Trophy Points:
    63
    Yes, the problem with the Itanium wasn't that it was technologically inferior, but that it wasn't cost effective. In order to get a reasonable modicum of performance from this out-of-order CPU, whole new instruction sets needed to be implemented. Incidentally AMD's Opteron CPUs perform phenominally well for the money, and make use of existing instruction sets as a fully x86 compatible CPU. Intel learned this lesson too late, trying to get their 64-bit P4 Xeon's out the door ASAP. But as everybody knows, the performance of those CPUs is abysmal compared to the Opteron, the price is high (although much cheaper than Itanium), and the power consumption is astronomical. Of course since more power = more heat, trying to use newer Xeons over Opterons is a bad decision, plain and simple.
     
  5. Big B

    Big B HWF Godfather

    Likes Received:
    145
    Trophy Points:
    63
    I'd been told by the geekier folks that the x86 set wasn't all that spectacular, but never elaborated as to why, nor did I ask. The Itainium's architecture is superior, but getting the current system to switch over is the kicker. Even though we have access to 64-bit CPU's now, seeing the industry behind it is an entirely different matter regarding software. Yes, you have the OS support, but I can't name a whole lot else, including driver support, that's been written/modified for 64-bit. Seeing how sluggish the 64-bit move is, I kinda wonder how hard it would be to get things changed over to an entirely different architecture. I'm not sure if it could be done like AMD did with the Athlon 64/Opteron and tack on the EPIC support onto an x86 processor. I know Transmeta tried it with the Crusoe processors and the VLIW, but that never really caught on very well.
     

Share This Page