Apologies if this should be in the overclocking forum. I've posted here because mostly my problem is not about overclocking. It's about understanding some BIOS settings. I am trying to maximise the performance of my ASUS A8V (Via K8T800 Pro northbridge) plus AMD Athlon 64 socket 939 3700+ San Diego (E6 stepping) CPU. The problem is that I seem to be getting inconsistent BIOS values presented to me by Asus SETUP, CPU-Z (version 1.49) and A64 Tweaker (version 0.60 Beta) and I want to understand why. Having set some BIOS values such that the system wouldn't POST I have set everything back to Auto/factory settings, with the exception of Memclock Mode, which I have set to 'Limit' Next I have set Memclock to CPU ratio to 1:1 which SETUP says is DDR200. If I set it to 2:1 (DDR400 - which is the memory I have got - I think!) then the system will not complete POST With the 1:1 setting and with AI overclocking (in System Frequency/Voltage setting) set to 'adaptive overclocking' and overclocking showing as 3%, the following confusing data is presented: A64 tweaker says Memclk frequency = 100 (I am expecting 200) Refresh rate (Tref) = 100 MHz; 3.9 usec (I am expecting 200) All other A64 outputs are as expected (not ideal, but expected) with the exception of 2T command setting. I have set this in BIOS as 'disabled' but both A64 and CPU-Z show it as 'enabled' and command rate = 2T CPU-Z says Core speed = 2266 MHz (expected at 3% o'clock) HT = 1029 (expected) Bus speed = 206 MHz (exactly expected) Multiplier = 11.0 (expected) Data from the SPD: max. bandwidth = PC3200 (200 MHz) which is what I expect) Memory = Corsair VS512MB400 (which is what I expect) CPU-Z Memory tab says: DRAM frequency = 103 MHz (not what I expect) and FSB/DRAM ratio = CPU/22 (which is not what I expect - I expect CPU/11) Does all this mean that my memory system is running only at half its rated speed (in which case why can't I set memclock to CPU ratio to 2:1 ?) or is all this explained in some way - which I don't understand - by the fact that I have dual channel memory? Any explanation would be most welcome.